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MRF49XA
2.1 Power and Ground Pins
The power supply bypassing is very essential for better
handling of signal surges and noise in the power line.
The large value decoupling capacitors should be
The device enters the Reset mode if any of the
following events take place:
? Power-on Reset
? Power Glitch Reset
placed at the PCB power input. The smaller value
?
Software Reset
decoupling capacitors should be placed at every power
point of the device and at bias points for the RF port.
Poor bypassing leads to conducted interference which
can cause noise and spurious signals to couple into the
RF sections, thereby significantly reducing the
performance.
The V DD pin requires two bypass capacitors to ensure
sufficient bypass and decoupling. However, based on
the selected carrier frequency, the bypass capacitor
? RESET Pin
Software Reset can be issued by sending the
appropriate control command to the device. The result
of the command is similar to POR, but the duration of
the Reset event is much less, typically 0.25 ms. The
Software Reset works only when the Sensitive Reset
mode is selected. See Section 3.1, Reset for details on
Reset; for connection details, see Figure 4-1 .
values vary. The recommended bypass capacitor
values are listed in Table 2-2 and the type of capacitor
2.3
Power Amplifier
to be used is listed in Table 2-3 . The bypass capacitors
are connected to pin 14, as shown in Figure 4-1 . The
trace length (V DD pin to bypass capacitors) should be
made as short as possible.
The PA has an open-collector differential output and can
directly drive different PCB antennas, like loop or dipole,
with a programmable output power level during signal
transmission. However, certain types of antennas, like
TABLE 2-2:
RECOMMENDED BYPASS
CAPACITORS VALUE
monopole, need an additional matching circuitry. A
built-in, automatic antenna tuning circuit is used to avoid
the manual tuning and trimming procedures during
Band
(MHz)
433
868
915
C1( μ F)
2.2
2.2
2.2
C2 (nF)
10
10
10
C3 (pF)
220
47
33
production process; the so called “hand effect”.
2.4 Low Noise Amplifier
The LNA has approximately 250 Ω of differential input
impedance which functions well with the proposed
antenna (PCB/Monopole) during signal transmission.
TABLE 2-3:
RECOMMENDED BYPASS
CAPACITORS
The LNA, when connected to the 50 Ω device, needs an
external matching circuit (Balun) for correct matching
and to minimize the noise figure of the receiver.
Property
SMD Size
Dielectric
C1
A
Tantalum
C2
0603
Ceramic
C3
0603
Ceramic
The LNA gain can be selected in four steps for different
gain factors (between 0 dB and -20 dB relative to the
highest gain) based on the required RF signal strength.
This gain selection feature is useful in a noisy
environment.
2.2
RESET Pin
An external hardware Reset of MRF49XA can be
performed by asserting the RESET (pin 10) to low.
After releasing the pin, it takes slightly more than
0.25 ms for the transceiver to be released from the
Reset. The pin is driven with an open-drain output, and
hence, it is pulled down while the device is in POR. The
RESET pin has an internal, weak, on-chip, pull-up
resistor. The device will not accept commands during
the Reset period.
? 2009-2011 Microchip Technology Inc.
Preliminary
DS70590C-page 13
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